- 专利标题: Apparatuses including buried digit lines
-
申请号: US16414417申请日: 2019-05-16
-
公开(公告)号: US10930652B2公开(公告)日: 2021-02-23
- 发明人: Shyam Surthi , Suraj Mathew
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: TraskBritt
- 主分类号: H01L27/105
- IPC分类号: H01L27/105 ; H01L21/768 ; H01L21/74 ; H01L27/108
摘要:
Methods of forming semiconductor device structures include forming trenches in an array region and in a buried digit line end region, forming a metal material in the trenches, filling the trenches with a mask material, removing the mask material in the trenches to expose a portion of the metal material, and removing the exposed portion of the metal material. A plurality of conductive contacts is formed in direct contact with the metal material in the buried digit line end region. Methods of forming a buried digit line contact include forming conductive contacts physically contacting metal material in trenches in a buried digit line end region. Vertical memory devices and apparatuses include metallic connections disposed between a buried digit line and a conductive contact in a buried digit line end region.
公开/授权文献
- US20190273080A1 APPARATUSES INCLUDING BURIED DIGIT LINES 公开/授权日:2019-09-05
信息查询
IPC分类: