Invention Grant
- Patent Title: Countering digit line coupling in memory arrays
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Application No.: US16541940Application Date: 2019-08-15
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Publication No.: US10943624B1Publication Date: 2021-03-09
- Inventor: Scott J. Derner
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G11C7/02
- IPC: G11C7/02 ; G11C7/08 ; G11C7/12 ; G11C8/08

Abstract:
Apparatuses and methods can be related to countering noise at a memory array. Countering noise can include enable switches to connect third digit lines of the first array adjacent to the respective first digit lines to fourth digit lines of the second array adjacent to the reference digit lines such that the reference digit lines experience a same amount of digit line coupling noise as the first digit lines experience.
Public/Granted literature
- US20210050038A1 COUNTERING DIGIT LINE COUPLING IN MEMORY ARRAYS Public/Granted day:2021-02-18
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