A memory controller includes a sensor poller and a proportional integral controller (PIC) coupled to the sensor poller. The sensor poller is to obtain a temperature and a power of a memory module (MM) operated by the controller, and the PIC is to: dynamically set at least one bandwidth limit for the MM, based, at least in part, on a relationship between a temperature of the MM, a power of the MM and a bandwidth of the MM. The dynamically set bandwidth limit defines the power of the MM at which the MM operates for a predetermined temperature limit. A system includes a memory controller and a dual in-line memory module (DIMM) operated by it.