发明授权
- 专利标题: Performance based method and system for patrolling read disturb errors in a memory unit
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申请号: US15463750申请日: 2017-03-20
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公开(公告)号: US10971241B2公开(公告)日: 2021-04-06
- 发明人: Tadashi Nagahara , Franklin Antony muthu Sunder
- 申请人: TOSHIBA MEMORY CORPORATION
- 申请人地址: JP Minato-ku
- 专利权人: TOSHIBA MEMORY CORPORATION
- 当前专利权人: TOSHIBA MEMORY CORPORATION
- 当前专利权人地址: JP Minato-ku
- 代理机构: Oblon, McClelland, Maier & Neustadt, L.L.P.
- 优先权: IN201741003371 20170130
- 主分类号: G06F3/06
- IPC分类号: G06F3/06 ; G11C16/34 ; G06F11/10
摘要:
Disclosed herein is a method and a system for handling read disturb errors in a memory unit. Status information related to each memory block in the memory unit is retrieved and plurality of target memory blocks with valid pages and having highest block erase count are identified for patrolling. Each valid page in the target memory blocks are patrolled for identifying read disturb errors. Finally, each valid page having read disturb errors are recycled, thereby effectively handling the read disturb errors in the memory unit. The method disclosed herein involves patrolling of only the valid pages in the memory block, thereby reducing the time required for handling the read disturb errors and improving the overall performance. Also, the method ensures data retention reliability within each memory blocks by patrolling the memory block in the order of highest block erase counts.
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