Invention Grant
- Patent Title: Method of forming a semiconductor memory device with a laterally etched bottom dielectric layer
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Application No.: US16137513Application Date: 2018-09-20
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Publication No.: US10971498B2Publication Date: 2021-04-06
- Inventor: Chien-Ming Lu , Fu-Che Lee , Feng-Yi Chang
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsin-Chu; CN Quanzhou
- Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsin-Chu; CN Quanzhou
- Agent Winston Hsu
- Priority: CN201810968333.1 20180823
- Main IPC: H01L27/108
- IPC: H01L27/108

Abstract:
A semiconductor memory device and a method of forming the same, the semiconductor memory device includes a substrate, a dielectric layer, plural bit lines, at least one bit line contact, a spacer structure and a spacer layer. The substrate has an isolation area to define plural active areas. The dielectric layer is disposed on the substrate, and the dielectric layer includes a bottom layer having a sidewall being retracted from sidewalls of other layers of the dielectric layer. The plural bit lines are disposed on the dielectric stacked structure, along a direction, and the at least one bit line contact is disposed below one of the bit lines, within the substrate. The spacer structure is disposed at sidewalls of each of the bit lines, and the spacer layer is disposed on the spacer structure to directly in contact with the spacer structure and the other layers of the dielectric layer.
Public/Granted literature
- US20200066728A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FORMING THE SAME Public/Granted day:2020-02-27
Information query
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