Invention Grant
- Patent Title: Methods for forming narrow vertical pillars and integrated circuit devices having the same
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Application No.: US16934844Application Date: 2020-07-21
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Publication No.: US10971683B2Publication Date: 2021-04-06
- Inventor: Jun Liu , Kunal Parekh
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: H01L45/00
- IPC: H01L45/00 ; H01L27/24

Abstract:
In some embodiments, an integrated circuit includes narrow, vertically-extending pillars that fill openings formed in the integrated circuit. In some embodiments, the openings can contain phase change material to form a phase change memory cell. The openings occupied by the pillars can be defined using crossing lines of sacrificial material, e.g., spacers, that are formed on different vertical levels. The lines of material can be formed by deposition processes that allow the formation of very thin lines. Exposed material at the intersection of the lines is selectively removed to form the openings, which have dimensions determined by the widths of the lines. The openings can be filled, for example, with phase change material.
Public/Granted literature
- US20200350496A1 METHODS FOR FORMING NARROW VERTICAL PILLARS AND INTEGRATED CIRCUIT DEVICES HAVING THE SAME Public/Granted day:2020-11-05
Information query
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