Invention Grant
- Patent Title: Scheduling for low-density parity-check codes
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Application No.: US16366997Application Date: 2019-03-27
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Publication No.: US10972217B2Publication Date: 2021-04-06
- Inventor: Ying Wang , Jing Jiang , Peter John Black , Joseph Binamira Soriaga , Gabi Sarkis
- Applicant: QUALCOMM incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM incorporated
- Current Assignee: QUALCOMM incorporated
- Current Assignee Address: US CA San Diego
- Agency: Holland & Hart LLP/Qualcomm Incorporated
- Main IPC: H03M13/00
- IPC: H03M13/00 ; H04L1/00 ; H03M13/11

Abstract:
Methods, systems, and devices for wireless communications are described. Efficient low-density parity-check (LDPC) scheduling of layered decoding may include receiving a message encoded as an LDPC code that includes a number of check nodes and a number of bit nodes, applying a first number of decoding iterations to decoding the message, applying a second number of decoding iterations to decoding the message after the first number of decoding iterations are applied, and decoding the message through completion of both the first number of decoding iterations and the second number of decoding iterations. In some cases, only a portion of the number of check nodes is decoded during each of the first number of decoding iterations and all of the number of check nodes are decoded during each of the second number of decoding iterations.
Public/Granted literature
- US20190305882A1 SCHEDULING FOR LOW-DENSITY PARITY-CHECK CODES Public/Granted day:2019-10-03
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