Invention Grant
- Patent Title: Encoder, decoder, encoding method, and decoding method of generating power of 2 transform block sizes
-
Application No.: US16388339Application Date: 2019-04-18
-
Publication No.: US10972754B2Publication Date: 2021-04-06
- Inventor: Ryuichi Kanoh , Tadamasa Toma , Takahiro Nishi , Kiyofumi Abe , Chong Soon Lim , Han Boon Teo , Ru Ling Liao , Jing Ya Li , Sughosh Pavan Shashidhar , Hai Wei Sun
- Applicant: Panasonic Intellectual Property Corporation of America
- Applicant Address: US CA Torrance
- Assignee: Panasonic Intellectual Property Corporation of America
- Current Assignee: Panasonic Intellectual Property Corporation of America
- Current Assignee Address: US CA Torrance
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Main IPC: H04N19/176
- IPC: H04N19/176 ; H04N19/119 ; H04N19/60 ; H04N19/18 ; H04N19/124

Abstract:
An encoder includes: circuitry; and memory. Using the memory, the circuitry: performs, when a size of a current block to be subjected to transform processing is not a power of 2, complementary processing of adding a complementary region to the current block to cause the size to be a power of 2; performs transform processing on the current block which has been subjected to the complementary processing; performs inverse transform processing on the current block which has been subjected to the transform processing; and eliminates the complementary region included in the current block which has been subjected to the inverse transform processing.
Public/Granted literature
- US20190327490A1 ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD Public/Granted day:2019-10-24
Information query