Invention Grant
- Patent Title: Area-efficient bi-directional ESD structure
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Application No.: US16518304Application Date: 2019-07-22
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Publication No.: US10998308B2Publication Date: 2021-05-04
- Inventor: Xianzhi Dai , Muhammad Yusuf Ali
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Andrew R. Ralston; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L21/76 ; H01L21/768

Abstract:
A semiconductor device has a protected node and a reference node, and a bi-directional ESD structure electrically coupled between the protected node and the reference node. The bi-directional ESD structure includes a main transistor electrically coupled between the protected node and the reference node, an upper control transistor with current nodes electrically coupled between the protected node and a control node of the main transistor, and a lower control transistor with current nodes electrically coupled between the reference node and a control node of the main transistor. The bi-directional ESD structure also includes an upper trigger network configured to provide a transient on-state signal to the upper control transistor from a positive electrical pulse on the protected node. The bi-directional ESD structure further includes a lower trigger network configured to provide a transient on-state signal to the lower control transistor from a negative electrical pulse on the protected node.
Public/Granted literature
- US20210028163A1 AREA-EFFICIENT BI-DIRECTIONAL ESD STRUCTURE Public/Granted day:2021-01-28
Information query
IPC分类: