发明授权
- 专利标题: Inverse pseudo fully-differential amplifier having common-mode feedback control circuit
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申请号: US16965342申请日: 2019-07-03
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公开(公告)号: US11050386B2公开(公告)日: 2021-06-29
- 发明人: Yubo Wang , Xiaoke Tang , Yi Hu , Dejian Li , Jin Shao , Xi Feng , Wennan Feng , Jiali Hou
- 申请人: BEIJING SMARTCHIP MICROELECTRONICS TECHNOLOGY COMPANY LIMITED , STATE GRID INFORMATION & TELECOMMUNICATION GROUP CO., LTD , State GRID CORPORATION OF CHINA
- 申请人地址: CN Beijing; CN Beijing; CN Beijing
- 专利权人: BEIJING SMARTCHIP MICROELECTRONICS TECHNOLOGY COMPANY LIMITED,STATE GRID INFORMATION & TELECOMMUNICATION GROUP CO., LTD,State GRID CORPORATION OF CHINA
- 当前专利权人: BEIJING SMARTCHIP MICROELECTRONICS TECHNOLOGY COMPANY LIMITED,STATE GRID INFORMATION & TELECOMMUNICATION GROUP CO., LTD,State GRID CORPORATION OF CHINA
- 当前专利权人地址: CN Beijing; CN Beijing; CN Beijing
- 代理机构: Cooper Legal Group, LLC
- 优先权: CN201910015848.4 20190108
- 国际申请: PCT/CN2019/094624 WO 20190703
- 国际公布: WO2020/143197 WO 20200716
- 主分类号: H03F1/02
- IPC分类号: H03F1/02 ; H03F3/45
摘要:
An inverse pseudo fully-differential amplifier having a common-mode feedback control circuit and a method for maintaining a stable output common-mode level are provided. The inverse pseudo fully-differential amplifier includes the pseudo fully-differential operation circuit and a common-mode feedback control circuit. The pseudo fully-differential operation circuit includes inverter amplifiers (2) and (3). The inverter amplifiers (2) and (3) respectively have a first feedback control terminal and a second feedback control terminal. Input terminals of the common-mode feedback control circuit are respectively connected with output terminals of the inverter amplifier (2) and (3), and are configured to detect common-mode output voltages of the inverter amplifier (2) and (3). An output terminal of the common-mode feedback control circuit is connected with the first feedback control terminal and the second feedback control terminal, and is configured to generate common-mode feedback to the inverter amplifiers (2) and (3) to maintain a stable common mode output level.
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