Invention Grant
- Patent Title: Method for FinFET fabrication and structure thereof
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Application No.: US16298720Application Date: 2019-03-11
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Publication No.: US11056393B2Publication Date: 2021-07-06
- Inventor: Han-Yu Lin , Yi-Ruei Jhan , Fang-Wei Lee , Tze-Chung Lin , Chao-Hsien Huang , Li-Te Lin , Pinyen Lin , Akira Mineji
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L27/088 ; H01L21/265 ; H01L21/764 ; H01L21/3105 ; H01L21/02 ; H01L21/311

Abstract:
A method for FinFET fabrication includes forming at least three semiconductor fins over a substrate, wherein first, second, and third of the semiconductor fins are lengthwise substantially parallel to each other, spacing between the first and second semiconductor fins is smaller than spacing between the second and third semiconductor fins; depositing a first dielectric layer over top and sidewalls of the semiconductor fins, resulting in a trench between the second and third semiconductor fins, bottom and two opposing sidewalls of the trench being the first dielectric layer; implanting ions into one of the two opposing sidewalls of the trench by a first tilted ion implantation process; implanting ions into another one of the two opposing sidewalls of the trench by a second tilted ion implantation process; depositing a second dielectric layer into the trench, the first and second dielectric layers having different materials; and etching the first dielectric layer.
Information query
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