Invention Grant
- Patent Title: Reduce power by frame skipping
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Application No.: US16791138Application Date: 2020-02-14
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Publication No.: US11094033B2Publication Date: 2021-08-17
- Inventor: Balaji Vembu , Nikos Kaburlasos , Josh B. Mastronarde
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Jaffery Watson Mendonsa & Hamilton LLP
- Main IPC: G06T1/20
- IPC: G06T1/20 ; G06T1/60 ; G06F1/32 ; G06F1/3234 ; G06F1/3231 ; G06F1/3203

Abstract:
In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive an input from one or more detectors proximate a display to present an output from a graphics pipeline, determine that a user is not interacting with the display, and in response to a determination that the user is not interacting with the display, to reduce a frame rendering rate of the graphics pipeline. Other embodiments are also disclosed and claimed.
Public/Granted literature
- US20200250788A1 REDUCE POWER BY FRAME SKIPPING Public/Granted day:2020-08-06
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