Efficient hardware instructions for single instruction multiple data processors: fast fixed-length value compression
Abstract:
Methods and apparatuses for determining set-membership using Single Instruction Multiple Data (“SIMD”) architecture are presented herein. Specifically, methods and apparatuses are discussed for compressing or packing, in parallel, multiple fixed-length values into a stream of multiple variable-length values using SIMD architecture.
Information query
Patent Agency Ranking
0/0