Invention Grant
- Patent Title: Processing in-memory architectures for performing logical operations
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Application No.: US16073202Application Date: 2016-03-31
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Publication No.: US11126549B2Publication Date: 2021-09-21
- Inventor: Naveen Muralimanohar , Ali Shafiee Ardestani
- Applicant: Hewlett Packard Enterprise Development LP
- Applicant Address: US TX Houston
- Assignee: Hewlett Packard Enterprise Development LP
- Current Assignee: Hewlett Packard Enterprise Development LP
- Current Assignee Address: US TX Houston
- Agency: Sheppard Mullin Richter & Hampton LLP
- International Application: PCT/US2016/025143 WO 20160331
- International Announcement: WO2017/171769 WO 20171005
- Main IPC: G06F7/57
- IPC: G06F7/57 ; G06F12/0802 ; G06F15/78 ; G06N3/063 ; G06N3/04 ; G06F17/16 ; G06N3/08

Abstract:
In an example, a method includes identifying, using at least one processor, data portions of a plurality of distinct data objects stored in at least one memory which are to be processed using the same logical operation. The method may further include identifying a representation of an operand stored in at least one memory, the operand being to provide the logical operation and providing a logical engine with the operand. The data portions may be stored in a plurality of input data buffers, wherein each of the input data buffers comprises a data portion of a different data object. The logical operation may be carried out on each of the data portions using the logical engine, and the outputs for each data portion may be stored in a plurality of output data buffers, wherein each of the outputs comprising data derived from a different data object.
Public/Granted literature
- US20190042411A1 LOGICAL OPERATIONS Public/Granted day:2019-02-07
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