A semiconductor apparatus having through silicon via structure and a manufacturing method thereof to enable the significant process and cost reduction and the improvement of performance of through silicon via by forming barrier and seed metal layers with electroless plating, the barrier layer applied in forming through silicon via with wet electroless plating thereby enabling structural uniformity and improvement in electrical properties with less process cost and higher yield to meet the both performance and economic objectives. The instant invention enables the formation of TSV with smaller diameter of the opening and, if necessary, omitting the formation of copper seed layer. Direct copper plating on the barrier layer is possible and this reduces the number of processes, charges the inside of via at once through copper plating to bring more improvements in electrical properties as effect.