Invention Grant
- Patent Title: Array substrate with stacked gate lines, manufacturing method thereof, and display device with stacked gate lines
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Application No.: US15984744Application Date: 2018-05-21
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Publication No.: US11133334B2Publication Date: 2021-09-28
- Inventor: Xiang Wang , Zhen Zhang , Ru Zhou
- Applicant: BOE TECHNOLOGY GROUP CO., LTD. , HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Applicant Address: CN Beijing; CN Anhui
- Assignee: BOE TECHNOLOGY GROUP CO., LTD.,HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Current Assignee: BOE TECHNOLOGY GROUP CO., LTD.,HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Current Assignee Address: CN Beijing; CN Anhui
- Agency: Calfee, Halter & Griswold LLP
- Priority: CN201710601592.6 20170721
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L29/417 ; H01L29/786

Abstract:
An array substrate, a manufacturing method thereof, and a display device including the array substrate. The array substrate includes a plurality of gate line groups and a plurality of data lines disposed on a substrate, the plurality of gate line groups intersecting with the plurality of data lines to define a plurality of pixel units arranged in an array, wherein each of the plurality of gate line groups includes a first gate line and a second gate line insulated from each other, and orthographic projections of the first gate line and the second gate line of each of the plurality of gate line groups on the substrate at least partially overlap.
Public/Granted literature
- US20190027500A1 ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE Public/Granted day:2019-01-24
Information query
IPC分类: