Invention Grant
- Patent Title: Stress buffer layer in embedded package
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Application No.: US16808018Application Date: 2020-03-03
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Publication No.: US11183441B2Publication Date: 2021-11-23
- Inventor: Woochan Kim , Masamitsu Matsuura , Mutsumi Masumoto , Kengo Aoya , Hau Thanh Nguyen , Vivek Kishorechand Arora , Anindya Poddar
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Dawn Jos; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L23/10
- IPC: H01L23/10 ; H01L23/34 ; H01L23/367 ; H01L21/56 ; H01L23/00 ; H01L23/373

Abstract:
The disclosed principles provide a stress buffer layer between an IC die and heat spreader used to dissipate heat from the die. The stress buffer layer comprises distributed pairs of conductive pads and a corresponding set of conductive posts formed on the conductive pads. In one embodiment, the stress buffer layer may comprise conductive pads laterally distributed over non-electrically conducting surfaces of an embedded IC die to thermally conduct heat from the IC die. In addition, such a stress buffer layer may comprise conductive posts laterally distributed and formed directly on each of the conductive pads. Each of the conductive posts thermally conduct heat from respective conductive pads. In addition, each conductive post may have a lateral width less than a lateral width of its corresponding conductive pad. A heat spreader is then formed over the conductive posts which thermally conducts heat from the conductive posts through the heat spreader.
Information query
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