发明授权
- 专利标题: Process to yield ultra-large integrated circuits and associated integrated circuits
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申请号: US16789210申请日: 2020-02-12
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公开(公告)号: US11189558B2公开(公告)日: 2021-11-30
- 发明人: David Madajian
- 申请人: Raytheon Company
- 申请人地址: US MA Waltham
- 专利权人: Raytheon Company
- 当前专利权人: Raytheon Company
- 当前专利权人地址: US MA Waltham
- 主分类号: H01L23/522
- IPC分类号: H01L23/522 ; H01L21/768 ; H01L23/532
摘要:
An integrated circuit includes a first conductive layer and a first insulation layer formed on the first conductive layer. The integrated circuit also includes a second insulation layer formed on the first insulation layer and a second conductive layer formed on the second insulation layer. The first insulation layer may include a first defect, and the second insulation layer may include a second defect. The integrated circuit may also include a third insulation layer formed on the second conductive layer, a fourth insulation layer formed on the third insulation layer, and a third conductive layer formed on the fourth insulation layer. The third insulation layer may include a third defect, and the fourth insulation layer may include a fourth defect.
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