Invention Grant
- Patent Title: Execution of additional instructions prior to a first instruction in an interruptible or non-interruptible manner as specified in an instruction field
-
Application No.: US15265184Application Date: 2016-09-14
-
Publication No.: US11210103B2Publication Date: 2021-12-28
- Inventor: Horst Diewald , Johann Zipperer
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Charles F. Koch; Charles A. Brill; Frank D. Cimino
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F9/30 ; G06F9/46
Abstract:
A processor includes a plurality of execution units. At least one of the execution units is configured to determine, based on a field of a first instruction, a number of additional instructions to execute in conjunction with the first instruction and prior to execution of the first instruction.
Public/Granted literature
- US20170003973A1 Processor with Instruction Concatenation Public/Granted day:2017-01-05
Information query
