The disclosed technology generally relates to semiconductor devices and methods of forming the same. In one aspect, a method of forming a semiconductor device having vertical channel field-effect transistor (FET) devices comprises forming on a substrate, a plurality of semiconductor structures protruding vertically from a lower source/drain semiconductor layer of the substrate. The semiconductor structures can be arranged in an array having a plurality of rows and columns. The method can include etching metal line trenches between at least a subset of the rows and forming metal lines in the metal line trenches to contact the lower source/drain layer. The method can also include forming gate structures at least partly enclosing semiconductor structure channel portions located above the lower source/drain layer and forming upper source/drain metal contacts on semiconductor structure upper source/drain portions located above the channel portions.