A switching converter circuit includes a hysteretic comparator with a reference voltage (VREF) node and a feedback node. The switching converter circuit also includes a switchable error amplifier circuit coupled to the feedback node of the hysteretic comparator. The switchable error amplifier circuit includes an error amplifier that is coupled to the feedback node during a power-save mode and that is decoupled from the feedback node during a deep power-save mode initiated in response to a duration of the power-save mode being greater than a time threshold.