Invention Grant
- Patent Title: Interconnect structure and method for forming the same
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Application No.: US16571825Application Date: 2019-09-16
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Publication No.: US11227833B2Publication Date: 2022-01-18
- Inventor: Shao-Kuan Lee , Cheng-Chin Lee , Hsin-Yen Huang , Hai-Ching Chen , Shau-Lin Shue
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING, CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING, CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING, CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/528 ; H01L21/3213 ; H01L21/768 ; H01L23/522

Abstract:
A method for forming an interconnect structure is provided. The method for forming the interconnect structure includes forming a first dielectric layer over a substrate, forming a first conductive feature through the first dielectric layer, forming a first blocking layer on the first conductive feature, forming a first etching stop layer over the first dielectric layer and exposing the first blocking layer, removing at least a portion of the first blocking layer, forming a first metal bulk layer over the first etching stop layer and the first conductive feature, and etching the first metal bulk layer to form a second conductive feature electrically connected to the first conductive feature.
Public/Granted literature
- US20210082814A1 INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME Public/Granted day:2021-03-18
Information query
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