Invention Grant
- Patent Title: Bit line utilized in DRAM
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Application No.: US16583268Application Date: 2019-09-26
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Publication No.: US11239241B2Publication Date: 2022-02-01
- Inventor: Pin-Hong Chen , Yi-Wei Chen , Chih-Chieh Tsai , Tzu-Chieh Chen , Tsun-Min Cheng , Chi-Mao Hsu
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsin-Chu; CN Quanzhou
- Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsin-Chu; CN Quanzhou
- Agent Winston Hsu
- Priority: CN201810101479.6 20180201
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L21/768

Abstract:
A fabricating method of a semiconductive element includes providing a substrate, wherein an amorphous silicon layer covers the substrate. Then, a titanium nitride layer is provided to cover and contact the amorphous silicon layer. Later, a titanium layer is formed to cover the titanium nitride layer. Finally, a thermal process is performed to transform the titanium nitride layer into a nitrogen-containing titanium silicide layer.
Public/Granted literature
- US20200020698A1 BIT LINE UTILIZED IN DRAM Public/Granted day:2020-01-16
Information query
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