Invention Grant
- Patent Title: Semiconductor structure for preventing row hammering issue in DRAM cell and method for manufacturing the same
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Application No.: US16866573Application Date: 2020-05-05
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Publication No.: US11239243B2Publication Date: 2022-02-01
- Inventor: Chih-Chieh Tsai , Pin-Hong Chen , Tzu-Chieh Chen , Tsun-Min Cheng , Yi-Wei Chen , Hsin-Fu Huang , Chi-Mao Hsu , Shih-Fang Tzou
- Applicant: UNITED MICROELECTRONICS CORP. , Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicant Address: TW Hsin-Chu; CN Quanzhou
- Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee: UNITED MICROELECTRONICS CORP.,Fujian Jinhua Integrated Circuit Co., Ltd.
- Current Assignee Address: TW Hsin-Chu; CN Quanzhou
- Agent Winston Hsu
- Priority: CN201710351696.6 20170518
- Main IPC: H01L27/108
- IPC: H01L27/108

Abstract:
A method of manufacturing a semiconductor device for preventing row hammering issue in DRAM cell, including the steps of providing a substrate, forming a trench in the substrate, forming a gate dielectric conformally on the trench, forming an n-type work function metal layer conformally on the substrate and the gate dielectric, forming a titanium nitride layer conformally on the n-type work function metal layer, and filling a buried word line in the trench.
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