Invention Grant
- Patent Title: Multi-chip package
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Application No.: US16984383Application Date: 2020-08-04
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Publication No.: US11244738B2Publication Date: 2022-02-08
- Inventor: Dae Hoon Na , Jang Woo Lee , Jin Do Byun , Jeong Don Ihm
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2019-0003644 20190111
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/38 ; G11C29/36 ; H01L25/065 ; H01L25/18 ; H01L23/00

Abstract:
Provided are multi-chip packages. A multi-chip package includes a first memory chip and a second memory chip on a printed circuit board; a memory controller electrically connected to the first memory chip and the second memory chip via a first bonding wire and a second bonding wire; and a strength control module configured to control a drive strength of each of a first output driver of the first memory chip and a second output driver of the second memory chip, wherein the memory controller includes an interface circuit configured to receive each of first test data and second test data from the first output driver and the second output driver in which the drive strength is set by the strength control module, and output detection data for detecting whether the first bonding wire and the bonding wire are short-circuited based on the first and second test data.
Information query