Invention Grant
- Patent Title: Semiconductor package and manufacturing method thereof
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Application No.: US16105202Application Date: 2018-08-20
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Publication No.: US11244926B2Publication Date: 2022-02-08
- Inventor: Young-Hoon Son , Jung-Hwan Choi , Seok-Hun Hyun
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Sughrue Mion, PLLC
- Priority: KR10-2017-0175641 20171220
- Main IPC: H01L25/00
- IPC: H01L25/00 ; H01L25/065 ; H01L23/00 ; H01L25/10

Abstract:
A semiconductor package includes a first layer including a first semiconductor chip and a first through via, a first redistribution layer disposed on a surface of the first layer, and including a first-first wiring and a second-first wiring, and a second layer including a second semiconductor chip, and stacked on the first layer. The first semiconductor chip includes a first-first buffer, and the first-first buffer is electrically connected between the first-first wiring and the second-first wiring.
Public/Granted literature
- US20190189592A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2019-06-20
Information query
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