Invention Grant
- Patent Title: Core layer with fully encapsulated co-axial magnetic material around PTH in IC package substrate
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Application No.: US15910288Application Date: 2018-03-02
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Publication No.: US11246218B2Publication Date: 2022-02-08
- Inventor: Chong Zhang , Ying Wang , Junnan Zhao , Cheng Xu , Yikang Deng
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H05K1/16 ; H01L23/498 ; H01L21/48 ; H05K1/11 ; H05K3/00 ; H05K3/42 ; H01F41/04 ; H01F27/28 ; H01F17/00 ; H05K3/06 ; H01L23/00

Abstract:
Embodiments may include inductors with embedded magnetic cores and methods of making such inductors. In an embodiment, an integrated circuit package may include an integrated circuit die with a multi-phase voltage regulator electrically coupled to the integrated circuit die. In such embodiments, the multi-phase voltage regulator may include a substrate core and a plurality of inductors. The inductors may include a conductive through-hole disposed through the substrate core and a plugging layer comprising a dielectric material surrounding the conductive through-hole. In an embodiment, a magnetic sheath is formed around the plugging layer. In an embodiment, the magnetic sheath is separated from the plated through hole by the plugging layer. Additionally, a first layer comprising a dielectric material may be disposed over a first surface of the magnetic sheath, and a second layer comprising a dielectric material may be disposed over a second surface of the magnetic sheath.
Public/Granted literature
- US20190274217A1 CORE LAYER WITH FULLY ENCAPSULATED CO-AXIAL MAGNETIC MATERIAL AROUND PTH IN IC PACKAGE SUBSTRATE Public/Granted day:2019-09-05
Information query
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