A gate driving circuit and a display apparatus comprising the same are disclosed, in which a maximum voltage level of a plurality of scan signals output from one stage circuit can be prevented from being deteriorated. The gate driving circuit comprises first to mth stage circuits, wherein each of the first to mth stage circuits includes a logic circuit portion controlling a voltage of each of a first control node and a second control node, a node boosting circuit boosting the voltage of each of the control nodes in accordance with boosting shift clock signals, a scan output circuit outputting each of first to ith scan shift clock signals as first to ith scan signals (i is a natural number of 3 or more) in response to the boosting voltage of the first control node, and a carry output circuit outputting carry shift clock signals as carry signals in response to the boosting voltage of the first control node.