Invention Grant
- Patent Title: Nanosheet transistor with asymmetric gate stack
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Application No.: US16876443Application Date: 2020-05-18
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Publication No.: US11251288B2Publication Date: 2022-02-15
- Inventor: Ruilong Xie , Carl Radens , Kangguo Cheng , Juntao Li , Dechao Guo , Tao Li , Tsung-Sheng Kang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Randall Bluestone
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/06 ; H01L29/78 ; H01L29/423

Abstract:
Embodiments of the present invention are directed to methods and resulting structures for nanosheet devices having asymmetric gate stacks. In a non-limiting embodiment of the invention, a nanosheet stack is formed over a substrate. The nanosheet stack includes alternating semiconductor layers and sacrificial layers. A sacrificial liner is formed over the nanosheet stack and a dielectric gate structure is formed over the nanosheet stack and the sacrificial liner. A first inner spacer is formed on a sidewall of the sacrificial layers. A gate is formed over channel regions of the nanosheet stack. The gate includes a conductive bridge that extends over the substrate in a direction orthogonal to the nanosheet stack. A second inner spacer is formed on a sidewall of the gate. The first inner spacer is formed prior to the gate stack, while the second inner spacer is formed after, and consequently, the gate stack is asymmetrical.
Public/Granted literature
- US20210359103A1 NANOSHEET TRANSISTOR WITH ASYMMETRIC GATE STACK Public/Granted day:2021-11-18
Information query
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