Invention Grant
- Patent Title: Thin film transistor, array substrate, and method for fabricating the same
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Application No.: US16026307Application Date: 2018-07-03
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Publication No.: US11257955B2Publication Date: 2022-02-22
- Inventor: Qinghe Wang , Luke Ding , Leilei Cheng , Jun Bao , Tongshang Su , Dongfang Wang , Guangcai Yuan
- Applicant: BOE Technology Group Co., Ltd. , Hefei Xinsheng Optoelectronics Technology Co., Ltd.
- Applicant Address: CN Beijing; CN Anhui
- Assignee: BOE Technology Group Co., Ltd.,Hefei Xinsheng Optoelectronics Technology Co., Ltd.
- Current Assignee: BOE Technology Group Co., Ltd.,Hefei Xinsheng Optoelectronics Technology Co., Ltd.
- Current Assignee Address: CN Beijing; CN Anhui
- Agency: Arent Fox LLP
- Agent Michael Fainberg
- Priority: CN201710821855.4 20170913
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L27/12 ; H01L29/66 ; H01L21/02 ; H01L29/24 ; H01L29/45 ; H01L29/49 ; H01L21/027 ; H01L29/16 ; H01L51/00 ; H01L51/10

Abstract:
The disclosure provides a thin film transistor, an array substrate, and a method for fabricating the same. An embodiment of the disclosure provides a method for fabricating a thin film transistor, the method including: forming a gate, a gate insulation layer, and an active layer above an underlying substrate successively; forming a patterned hydrophobic layer above the active layer, wherein the hydrophobic layer includes first pattern components, and orthographic projections of the first pattern components onto the underlying substrate overlap with a orthographic projection of a channel area at the active layer onto the underlying substrate; and forming a source and a drain above the hydrophobic layer, wherein the source and the drain are located respectively on two sides of a channel area, and in contact with the active layer.
Public/Granted literature
- US20190081178A1 THIN FILM TRANSISTOR, ARRAY SUBSTRATE, AND METHOD FOR FABRICATING THE SAME Public/Granted day:2019-03-14
Information query
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