Invention Grant
- Patent Title: Method of manufacturing connection structure of semiconductor chip and method of manufacturing semiconductor package
-
Application No.: US16703239Application Date: 2019-12-04
-
Publication No.: US11264339B2Publication Date: 2022-03-01
- Inventor: Gyujin Choi , Sunghoan Kim , Changeun Joo , Chilwoo Kwon , Youngkyu Lim , Sunguk Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Sughrue Mion, PLLC
- Priority: KR10-2019-0022013 20190225
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/66 ; H01L21/48 ; H01L21/56 ; H01L23/31 ; H01L23/538

Abstract:
The method of manufacturing a connection structure of a semiconductor chip includes: preparing a semiconductor chip having a first surface having a connection pad disposed thereon and a second surface opposing the first surface and including a passivation layer disposed on the first surface and covering the connection pad; forming an insulating layer on the first surface of the semiconductor chip, the insulating layer covering at least a portion of the passivation layer; forming a via hole penetrating through the insulating layer to expose at least a portion of the passivation layer; exposing at least a portion of the connection pad by removing the passivation layer exposed by the via hole; forming a redistribution via by filling the via hole with a conductive material; and forming a redistribution layer on the redistribution via and the insulating layer.
Public/Granted literature
Information query
IPC分类: