A semiconductor device includes transistors on a substrate, a first interlayered insulating layer on the transistors, first and second lower interconnection lines in an upper portion of the first interlayered insulating layer, and first and second vias on the first and second lower interconnection lines, respectively. Each of the first and second lower interconnection lines includes a first metal pattern. The first lower interconnection line further includes a second metal pattern, on the first metal pattern with a metallic material different from the first metal pattern. The second metal pattern is absent in the second lower interconnection line. The second via includes first and second portions, which are in contact with respective top surfaces of the first interlayered insulating layer and the second lower interconnection line, and the lowest level of a bottom surface of the second portion is lower than that of a bottom surface of the first via.