Invention Grant
- Patent Title: Power loss protection in memory sub-systems
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Application No.: US16912318Application Date: 2020-06-25
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Publication No.: US11301381B2Publication Date: 2022-04-12
- Inventor: Andrew M. Kowles
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F12/0804
- IPC: G06F12/0804 ; G11C29/44

Abstract:
Aspects of the present disclosure provide systems and methods for improved power loss protection in a memory sub-system of a device. In particular, a power loss protection component allocates a portion of the memory sub-system to non-volatile memory. Responsive to detecting a trigger event at the device, wherein the trigger event may include asynchronous power loss of the device, the power loss protection component detects data written to a volatile cache of the memory sub-system, retrieves the data from the volatile cache, and writes the data to the portion of the memory sub-system allocated to the non-volatile memory.
Public/Granted literature
- US20200327056A1 POWER LOSS PROTECTION IN MEMORY SUB-SYSTEMS Public/Granted day:2020-10-15
Information query
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