Invention Grant
- Patent Title: Securing conditional speculative instruction execution
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Application No.: US16942591Application Date: 2020-07-29
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Publication No.: US11307861B2Publication Date: 2022-04-19
- Inventor: Steven Jeffrey Wallach
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Greenberg Traurig
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F9/30

Abstract:
A method performed in a processor, includes: receiving, in the processor, a branch instruction in the processing; determining, by the processor, an address of an instruction after the branch instruction as a candidate for speculative execution, the address including an object identification and an offset; and determining, by the processor, whether or not to perform speculative execution of the instruction after the branch instruction based on the object identification of the address.
Public/Granted literature
- US20210349724A9 SECURING CONDITIONAL SPECULATIVE INSTRUCTION EXECUTION Public/Granted day:2021-11-11
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