A gate driver on array (GOA) display panel is provided, including a display area, a bezel area, a plurality of pixel units, and a GOA circuit. The plurality of pixel units are disposed in the display area in an array. The GOA circuit includes a GOA unit group and a trace group. The GOA unit group is disposed in the display area. The trace group is electrically connected to the GOA unit group and is disposed in the bezel area. The trace group includes a GOA bus and a common electrode line. A super narrow bezel design is achieved by arranging the cascaded GOA unit group of the GOA circuit within the display area.