Invention Grant
- Patent Title: Semiconductor packages and manufacturing methods thereof
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Application No.: US16907317Application Date: 2020-06-22
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Publication No.: US11322479B2Publication Date: 2022-05-03
- Inventor: Zi-Jheng Liu , Chen-Cheng Kuo , Hung-Jui Kuo
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/31 ; H01L23/538 ; H01L23/00 ; H01L23/522 ; H01L21/683 ; H01L21/56 ; H01L23/498 ; H01L23/50 ; H01L21/48

Abstract:
A semiconductor package includes a first chip, a plurality of through vias and an encapsulant. The first chip has a first via and a protection layer thereon. The first via is disposed in the protection layer. The through vias are disposed aside the first chip. The encapsulant encapsulates the first chip and the plurality of through vias. A surface of the encapsulant is substantially coplanar with surfaces of the protection layer and the plurality of through vias.
Public/Granted literature
- US20200321314A1 SEMICONDUCTOR PACKAGES AND MANUFACTURING METHODS THEREOF Public/Granted day:2020-10-08
Information query
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