Invention Grant
- Patent Title: Compute accelerator with 3D data flows
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Application No.: US17093227Application Date: 2020-11-09
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Publication No.: US11341086B2Publication Date: 2022-05-24
- Inventor: Amogh Agrawal , Thomas Vogelsang , Steven C. Woo
- Applicant: Rambus Inc.
- Applicant Address: US CA San Jose
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA San Jose
- Agency: The Neudeck Law Firm, LLC
- Main IPC: G06F15/80
- IPC: G06F15/80

Abstract:
An array of processing elements are arranged in a three-dimensional array. Each of the processing elements includes or is coupled to a dedicated memory. The processing elements of the array are intercoupled to their nearest neighbor processing elements. A processing element on a first die may be intercoupled to a first processing element on a second die that is located directly above the processing element, a second processing element on a third die that is located directly below the processing element, and the four adjacent processing elements on the first die. This intercoupling allows data to flow from processing element to processing element in the three directions. These dataflows are reconfigurable so that they may be optimized for the task. The data flows of the array may be configured into one or more loops that periodically recycle data in order to accomplish different parts of a calculation.
Public/Granted literature
- US20210157582A1 COMPUTE ACCELERATOR WITH 3D DATA FLOWS Public/Granted day:2021-05-27
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