Semiconductor chip state detector
Abstract:
A semiconductor chip may have at least one p-channel field effect transistor (FET), at least one n-channel FET, a first and a second power supply terminal, wherein the at least one n-channel FET, if supplied with the upper supply potential at its gate, supplies the lower supply potential to the gate of the at least one p-channel FET and the at least one p-channel FET, if supplied with the lower supply potential at its gate, supplies the upper supply potential to the gate of the at least one n-channel FET, a precharge circuit to precharge the circuit to a first state, and a detection circuit configured to output an alarm signal if the circuit enters a second state.
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