Invention Grant
- Patent Title: Method for manufacturing nanostructures with various widths
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Application No.: US16911665Application Date: 2020-06-25
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Publication No.: US11362001B2Publication Date: 2022-06-14
- Inventor: Hsiao-Han Liu , Chih-Hao Wang , Kuo-Cheng Chiang , Shi-Ning Ju , Kuan-Lun Cheng
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L27/088 ; H01L29/78

Abstract:
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a first fin structure, a second fin structure, a third fin structure, and a fourth fin structure formed over a substrate. The semiconductor structure further includes first nanostructures, second nanostructures, third nanostructures, and fourth nanostructures. The semiconductor structure further includes a first gate structure wrapping around the first nanostructures and the second nanostructures, and a second gate structure wrapping around the third nanostructures and the fourth nanostructures. In addition, a first lateral distance between the first fin structure and the second fin structure is shorter than a second lateral distance between the third fin structure and the fourth fin structure, and the first fin structure and the second fin structure are narrower than the third fin structure and the fourth fin structure.
Public/Granted literature
- US20200328123A1 NANOSTRUCTURE WITH VARIOUS WIDTHS AND METHODS FOR MANUFACTURING THE SAME Public/Granted day:2020-10-15
Information query
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