Invention Grant
- Patent Title: Storage structure and erase method thereof
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Application No.: US17049972Application Date: 2019-12-17
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Publication No.: US11366603B2Publication Date: 2022-06-21
- Inventor: Jongbae Jeong
- Applicant: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.
- Applicant Address: CN Wuhan
- Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: CN Wuhan
- Agent Winston Hsu
- Priority: CN201911214611.5 20191202
- International Application: PCT/CN2019/125963 WO 20191217
- International Announcement: WO2021/109243 WO 20210610
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
The invention provides a storage structure and an erase method thereof, capable of performing an erase operation on a plurality of memory blocks. The storage structure includes: a first storage body, a second storage body, a third storage body, and a controller. Memory blocks that are consecutively numbered are sequentially alternately stored in the first memory bank, the second memory bank, and the third memory bank, and the controller is configured to control each memory block to sequentially undergo a first process, a second process and a third process. The erase method includes: when a memory block Bi undergoes the third process, a memory block Bi+1 undergoes the second process, and a memory block Bi+2 undergoes the first process at the same time; where i ∈ [1, n−2]. Three adjacent blocks undergo the first process, the second process, and the third process simultaneously.
Public/Granted literature
- US20210326057A1 STORAGE STRUCTURE AND ERASE METHOD THEREOF Public/Granted day:2021-10-21
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