Invention Grant
- Patent Title: Binner circuit for image signal processor
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Application No.: US17334409Application Date: 2021-05-28
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Publication No.: US11375140B2Publication Date: 2022-06-28
- Inventor: Sheng Lin , D. Amnon Silverstein
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Fenwick & West LLP
- Main IPC: H04N5/347
- IPC: H04N5/347 ; H04N5/367 ; H04N5/232 ; G06T5/00 ; H04N9/64 ; H04N9/04 ; H04N5/345

Abstract:
Embodiments relate to image signal processors (ISP) that include binner circuits that down-sample an input image. An input image may include a plurality of pixels. The output image of the binner circuit may include a reduced number of pixels. The binner circuit may include a plurality of different operation modes. In a bin mode, the binner circuit may blend a subset of input pixel values to generate an output pixel quad. In a skip mode, the binner circuit may select one of the input pixel values as the output pixel pixel. The selection may be performed randomly to avoid aliasing. In a luminance mode, the binner circuit may take a weighted average of a subset of pixel values having different colors. In a color value mode, the binner circuit may select one of the colors in a subset of pixel values as an output pixel value.
Public/Granted literature
- US20210360176A1 BINNER CIRCUIT FOR IMAGE SIGNAL PROCESSOR Public/Granted day:2021-11-18
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