- 专利标题: Low-voltage anti-fuse element
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申请号: US16808505申请日: 2020-03-04
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公开(公告)号: US11380694B2公开(公告)日: 2022-07-05
- 发明人: Cheng-Ying Wu , Yu-Ting Huang , Wen-Chien Huang
- 申请人: YIELD MICROELECTRONICS CORP.
- 申请人地址: TW Chu-Pei
- 专利权人: YIELD MICROELECTRONICS CORP.
- 当前专利权人: YIELD MICROELECTRONICS CORP.
- 当前专利权人地址: TW Chu-Pei
- 代理机构: Rosenberg, Klein & Lee
- 优先权: TW109103372 20200204
- 主分类号: H01L27/112
- IPC分类号: H01L27/112
摘要:
A low-voltage anti-fuse element is provided with a first gate dielectric layer and a first gate sequentially disposed on a substrate. A first ion-doped region is formed in the substrate on one side of the first gate. The first gate includes a body portion and a sharp corner portion extending and gradually reducing from one side of the body portion both adjacent to the first gate dielectric layer. During the operation, the principle of higher density of charges at sharp corners is utilized. When the write voltage is applied between the first gate and the first ion-doped region, a portion of the first gate dielectric layer below the sharp corner portion is liable to break down. Therefore, the breakdown voltage is reduced to achieve the purpose of reducing current consumption, while decreasing the gate area, the element size and production costs.
公开/授权文献
- US20210242223A1 LOW-VOLTAGE ANTI-FUSE ELEMENT 公开/授权日:2021-08-05
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