A phase-locked loop includes a bias circuit controlling a first bias current between a first power source and a first node according to a bias control signal; an oscillation circuit coupled between the first node and a second power source and generating an oscillation signal according to a current from the first node; a duplicate bias circuit controlling a second bias current between the first power source and a second node according to the bias control signal; an equivalent impedance circuit coupled between the second node and the second power source; a comparator circuit comparing voltages of the first node and the second node; a first variable current circuit controlling a current between the first node and the second power source; and a second variable current circuit controlling a current between the second node and the second power source.