Invention Grant
- Patent Title: High speed multi moduli CMOS clock divider
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Application No.: US17386591Application Date: 2021-07-28
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Publication No.: US11429136B2Publication Date: 2022-08-30
- Inventor: Robert Callaghan Taft , Vineethraj Rajappan Nair
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Charles A. Brill; Frank D. Cimino
- Main IPC: H03K21/00
- IPC: H03K21/00 ; G06F1/10 ; H03L7/099 ; H03K5/00 ; H03K3/03

Abstract:
An electronic circuit which is a high speed CMOS logic circuit to divide the frequency of an input signal is provided. The electronic circuit comprises a ring oscillator. The ring oscillator comprises a plurality of gated inverters. At least one of the gated inverters is configured to receive an oscillating signal and a control signal at two complementary inputs. The electronic circuit is configured to be partially gated such that a divide ratio is selectable. By means of clock partial gating, open loop clock buffering and avoiding slow combinatory logic in the data path, a very high speed multi-moduli clock divider is achieved.
Public/Granted literature
- US20210356984A1 High Speed Multi Moduli CMOS Clock Divider Public/Granted day:2021-11-18
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