Invention Grant
- Patent Title: ESD protection in an electronic device
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Application No.: US16662425Application Date: 2019-10-24
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Publication No.: US11430749B2Publication Date: 2022-08-30
- Inventor: Markus Mergens , Werner Simbuerger
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Armis IP Law, LLC
- Main IPC: H01L23/60
- IPC: H01L23/60 ; H01L29/66 ; H01L21/285 ; H01L23/522

Abstract:
According to one configuration, a fabricator produces an electronic device to include: a substrate; a transistor circuit disposed on the substrate; silicide material disposed on first regions of the transistor circuit; and the silicide material absent from second regions of the transistor circuit. Absence of the silicide material over the second regions of the respective of the transistor circuit increases a resistance of one or more parasitic paths (such as one or more parasitic transistors) in the transistor circuit. The increased resistance in the one or more parasitic paths provides better protection of the transistor circuit against electro-static discharge conditions.
Information query
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