- Patent Title: Voltage bin calibration based on a temporary voltage shift offset
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Application No.: US17230786Application Date: 2021-04-14
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Publication No.: US11437108B1Publication Date: 2022-09-06
- Inventor: Kishore Kumar Muchherla , Karl Schuh , Mustafa N Kaynak , Xiangang Luo , Shane Nowell , Devin Batutis , Sivagnanam Parthasarathy , Sampath Ratnam , Jiangang Wu , Peter Feeley
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G11C16/34
- IPC: G11C16/34 ; G11C16/30 ; G11C16/10 ; G11C7/04 ; G11C16/32 ; G11C16/26

Abstract:
A difference between a current temperature and a prior temperature of a memory device is determined. In response to a determination that the difference between the current temperature and the prior temperature of the memory device satisfies a temperature criterion, an amount of voltage shift is measured for a set of memory cells of a block family associated with a first voltage bin of a set of voltage bins at the memory device. The first voltage bin is associated with a first voltage offset. An adjusted amount of voltage shift is determined for the set of memory cells based on the determined amount of voltage shift and a temporary voltage shift offset associated with the difference between the current temperature and the prior temperature for the memory device. In response to a determination that the adjusted amount of voltage shift satisfies a voltage shift criterion, the block family is associated with a second voltage bin of the set of voltage bins. The second voltage bin is associated with a second voltage offset.
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