Invention Grant
- Patent Title: Integrated circuit structure with avalanche junction to doped semiconductor over semiconductor well
-
Application No.: US16983071Application Date: 2020-08-03
-
Publication No.: US11444076B2Publication Date: 2022-09-13
- Inventor: Robert J. Gauthier, Jr. , Alain F. Loiseau , Souvick Mitra , Tsung-Che Tsai , Meng Miao , You Li
- Applicant: GLOBALFOUNDRIES U.S. Inc.
- Applicant Address: US CA Santa Clara
- Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee: GLOBALFOUNDRIES U.S. Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Hoffman Warnick LLC
- Agent Anthony Canale
- Main IPC: H01L27/02
- IPC: H01L27/02

Abstract:
Embodiments of the disclosure provide an integrated circuit (IC) structure, including a doped well in a semiconductor substrate, in addition to a base region, emitter region, and collector region in the doped well. An insulative material is within the doped well, with a first end horizontally adjacent the collector region and a second end opposite the first end. A doped semiconductor region is within the doped well adjacent the second end of the insulative material. The doped semiconductor region is positioned to define an avalanche junction between the collector region and the doped semiconductor region across the doped well.
Public/Granted literature
- US20220037309A1 INTEGRATED CIRCUIT STRUCTURE WITH AVALANCHE JUNCTION TO DOPED SEMICONDUCTOR OVER SEMICONDUCTOR WELL Public/Granted day:2022-02-03
Information query
IPC分类: