A pixel of a display device includes a capacitor; a light emitting diode; and first, second, third, and fourth transistors. The display device has a normal frequency mode and a low frequency mode. Two electrodes of the capacitor are respectively connected to a first voltage source and a gate node. A gate electrode of the first transistor is connected to the gate node. In a hold period in the low frequency mode, both the second and third transistors receive a scan signal, the third transistor diode-connects the first transistor, the fourth transistor receives an initialization signal and transfers an initialization voltage to the gate node, the scan signal is at a first off voltage level, and the initialization signal is at a second off voltage level unequal to the first off voltage level. The cathode of the light emitting diode is connected to a second voltage source.