- 专利标题: Hybrid ball grid array package for high speed interconnects
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申请号: US16984173申请日: 2020-08-04
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公开(公告)号: US11527463B2公开(公告)日: 2022-12-13
- 发明人: Bok Eng Cheah , Jenny Shio Yin Ong , Seok Ling Lim , Kooi Chi Ooi , Jackson Chung Peng Kong
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Viering, Jentschura & Partner MBB
- 优先权: MYPI2020002630 20200527
- 主分类号: H01L23/498
- IPC分类号: H01L23/498 ; H01L21/48 ; H01L23/522
摘要:
According to various examples, a semiconductor package is described including a substrate raiser with interconnect vias that may be positioned on the bottom side of a substrate and mini solder balls positioned on the interconnect vias and a plurality of large solder balls positioned on the bottom side of the substrate adjacent to the substrate raiser, wherein the mini solder balls and the large solder balls extend approximately a same height from the substrate for mounting on a printed circuit board.
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