Invention Grant
- Patent Title: Method of fabricating array substrate, array substrate, and display apparatus
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Application No.: US16755672Application Date: 2019-04-15
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Publication No.: US11532679B2Publication Date: 2022-12-20
- Inventor: Zhu Chen , Kwiyoung Yun , Xin Cao , Hongcan Liu , Ming Dai , Haifeng Xu , Haoyuan Fan
- Applicant: Mianyang BOE Optoelectronics Technology Co., Ltd. , BOE Technology Group Co., Ltd.
- Applicant Address: CN Sichuan; CN Beijing
- Assignee: Mianyang BOE Optoelectronics Technology Co., Ltd.,BOE Technology Group Co., Ltd.
- Current Assignee: Mianyang BOE Optoelectronics Technology Co., Ltd.,BOE Technology Group Co., Ltd.
- Current Assignee Address: CN Sichuan; CN Beijing
- Agency: Intellectual Valley Law, P.C.
- International Application: PCT/CN2019/082704 WO 20190415
- International Announcement: WO2020/210946 WO 20201022
- Main IPC: H01L27/00
- IPC: H01L27/00 ; H01L27/32 ; H01L29/66 ; H01L29/786 ; H01L29/417 ; H01L27/12

Abstract:
A method of fabricating an array substrate is provided. The method includes forming a plurality of first thin film transistors on a base substrate, a respective one of the plurality of first thin film transistors formed to include a first active layer, a first gate electrode, a first source electrode and a first drain electrode; and forming a plurality of second thin film transistors on the base substrate, a respective one of the plurality of second thin film transistors formed to include a second active layer, a second gate electrode, a second source electrode and a second drain electrode. Forming the first source electrode includes forming a first source sub-layer and forming a second source sub-layer in separate patterning steps. Forming the first drain electrode includes forming a first drain sub-layer and forming a second drain sub-layer in separate patterning steps.
Public/Granted literature
- US20210233978A1 METHOD OF FABRICATING ARRAY SUBSTRATE, ARRAY SUBSTRATE, AND DISPLAY APPARATUS Public/Granted day:2021-07-29
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